EENG 498
Getting Started
Install Vitis
Some difficult Vivado/Vitis errors
Vivado
Create Vivado Project
Configure a Vivado Project
Perform a Vivado Simulation
Download Vidado design to ALINX board
Instantiating Clock and HDMI IP
Setup simulation with TCL file
Build Block RAM
Build an IP core and connect to Zynq
Interface IP to the Zynq
Vitis
Communicate with IP through the Zynq
Program with the Zynq interrupt